The technical online interview lasted 45 minutes. The interviewer, who was in the PST timezone, conducted the interview on Coderpad.

We started with a discussion about my professional journey so far, followed by the coding interview. An initial document was shared prior to the interview, listing possible topics for preparation.

I was asked to provide 4-5 available timeslots for the interview, and the slot was finalized within 1-2 days.

Write an SV constraint to generate 4 non-overlapping memory regions of sizes 32, 64, 128, and 256 within a 4k memory region.

Write a UVM driver for a simple valid-ready protocol.

• When data is available, assert the valid signal.
• Keep the data stable and valid high until ready is asserted.
• De-assert the valid signal once ready is asserted.

systemverilog interface mem_if ( input clk ); logic [15:0] Data; logic Valid; logic Ready; endinterface

Launch 5 tasks (t1, t2, t3, t4, t5) in parallel. Wait for 4 of the tasks to complete, and then kill task t3.