Taro Logo

Firmware Engineer Interview Experience - San Jose, California

October 1, 2024
Positive ExperienceNo Offer

Process

Three-round interview:

  • Coding questions for both Verilog and C++
  • Verilog basic knowledge
  • Logic design
  • FPGA-related knowledge
  • Computer architecture
  • Behavioral questions
  • PCB-related knowledge
  • Company background

The interview process spanned three weeks.

Questions

Why apply for this job? Why this company?

Was this helpful?

Interview Statistics

The following metrics were computed from 2 interview experiences for the Supermicro Firmware Engineer role in San Jose, California.

Success Rate

0%
Pass Rate

Supermicro's interview process for their Firmware Engineer roles in San Jose, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Supermicro's Firmware Engineer interview process in San Jose, California.