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R&D Engineer Adv Tech Dev 1

A global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.
$66,000 - $105,000
Embedded
Entry-Level Software Engineer
In-Person
5,000+ Employees
AI · Enterprise SaaS
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Description For R&D Engineer Adv Tech Dev 1

Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking an R&D Engineer for Advanced Technology Development. This role combines hardware engineering with software elements, focusing on advanced node silicon chip design and packaging. The position offers an opportunity to work with cutting-edge technology (7nm, 5nm, 3nm nodes) and collaborate with various engineering teams.

The role involves designing and optimizing chip floor plans, working with IP owners, and ensuring packages meet critical performance requirements. You'll be involved in the entire product lifecycle, from concept through development to high-volume production. The position requires a unique blend of technical expertise in signal integrity, power integrity, and thermal management.

This is an excellent opportunity for early-career engineers to join a leading technology company. The role offers comprehensive benefits including medical coverage, 401(k) matching, and equity participation. You'll work with state-of-the-art technology and have the chance to contribute to innovative solutions in semiconductor development.

The position is based in either Irvine or San Jose, California, offering competitive compensation between $66,000 and $105,000 annually. Broadcom provides a collaborative environment where you can grow your career while working on challenging technical problems in semiconductor design and development.

Last updated a month ago

Responsibilities For R&D Engineer Adv Tech Dev 1

  • Work with Business Units chip design team & Analog/Digital IP owners for new advanced node silicon chip floor plan & IP bump pattern design
  • Work with business unit marketing and IC design teams to select optimum package solutions
  • Work with IC design, system design, package SI/PI & thermal engineering teams to design custom packages
  • Ensure designed packages meet CPI, SI/PI, and thermal requirements
  • Research, develop, and productize new materials
  • Manage IC packaging activity from concept through development
  • Create package design documentation and assembly instructions
  • Interface with packaging assembly and substrate suppliers
  • Participate in package technology development projects

Requirements For R&D Engineer Adv Tech Dev 1

  • BS/MS/PHD in Material Science/Electrical/Mechanical Engineering
  • 0-2+ years in IC packaging and assembly
  • Deep understanding of signal integrity and power integrity concepts
  • Strong authority on Cadence APD for custom substrate design
  • Hands-on expertise of advanced assembly processes
  • Good understanding of materials related to Chip Packaging Interaction
  • Knowledge of advanced substrate manufacturing/process
  • Strong project management, communication and leadership skills
  • Knowledge of GD&T and mechanical drawings
  • Understanding of manufacturing and quality engineering fundamentals

Benefits For R&D Engineer Adv Tech Dev 1

401k
Medical Insurance
Dental Insurance
Vision Insurance
Equity
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • 401(k) with company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Paid holidays
  • Paid sick leave
  • Vacation time
  • Annual bonus
  • Equity awards

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