ASIC Verification Engineer
Description For ASIC Verification Engineer
Join Cisco's Common Hardware Group (CHG) as an ASIC Verification Engineer working on Cisco Silicon One, the industry's only unifying silicon architecture. This role involves collaborating with RTL Design, Verification teams, and Architects to drive chip architecture and verification requirements. You'll work on complex ASICs, interfacing between hardware and software teams to ensure seamless functionality.
The position offers an opportunity to work with cutting-edge technology in networking hardware for Enterprises and Service Providers. You'll be part of a team that delivers silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. The role requires strong technical skills in System Verilog/UVM programming and ASIC verification processes.
Cisco offers a comprehensive benefits package including medical, dental, and vision insurance, 401(k) with company matching, and flexible vacation time. The company culture promotes diversity, inclusion, and work-life balance, with opportunities for professional development and growth. You'll be part of Cisco's mission to power an inclusive future for all while working on revolutionary solutions in the networking industry.
The position requires 4+ years of experience and offers a competitive salary range of $133,300 - $186,800 USD. Located in San Jose, CA, you'll be at the heart of Silicon Valley, working with some of the industry's best minds in hardware engineering.
Responsibilities For ASIC Verification Engineer
- Work with front-end RTL Design and Verification teams and Architects to understand chip architecture
- Drive design verification requirements
- Work with SDK and Software teams for ASIC development
- Create flawless handshake between hardware and software functionalities
- Qualify use-case requirements
- Work with systems-testing teams during post-silicon validation
- Bring-up, debug and qualify the ASIC in deployment-mode applications
Requirements For ASIC Verification Engineer
- BSEE/CS combined with 4+ years of related experience
- 4+ Years post graduate hands on experience with System Verilog / UVM programming
- 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools
- Experience with scripting languages Python or Perl
- Previous experience in debugging
- Experience working on Linux / Unix
Benefits For ASIC Verification Engineer
- Quality medical, dental and vision insurance
- 401(k) plan with Cisco matching contribution
- Short and long-term disability coverage
- Basic life insurance
- Numerous wellbeing offerings
- Up to twelve paid holidays per calendar year
- Floating holiday
- Birthday day off
- Vacation Time Off policy
- 80 hours of sick time off
- Paid time for volunteering
