Join Cisco Silicon One team and be part of the cutting-edge innovation in next-generation network devices. This role operates in a startup-like atmosphere within a stable corporation, focusing on advanced silicon technologies. As a Senior DFT Engineer, you'll work on developing and implementing Design for Test features for high-quality, testable silicon designs. The position involves full product cycle contribution from pre-silicon design to production qualification, working closely with chip architects and design teams.
The role is based in Cisco's design center in Caesarea, Israel, where all silicon hardware and software development disciplines come together. You'll be part of redefining the industry by building next-generation internet infrastructure for the 5G era, working on Cisco Silicon One™ - a unified, programmable silicon architecture that powers Cisco's future routing products.
This is an excellent opportunity for an experienced engineer with a strong background in DFT methodologies and silicon design. You'll lead crucial aspects of chip testing, including ATPG implementation, scan compression, and memory BIST techniques. The position requires both technical expertise and strong communication skills, as you'll be collaborating across teams to optimize DFT strategies and improve yield and reliability.
Cisco offers comprehensive benefits, including medical, dental, and vision insurance, a 401k with company match, flexible vacation time, and paid volunteer time. The company culture promotes diversity, inclusion, and continuous learning, making it an ideal place for professional growth in the semiconductor industry.