Formal Verification Engineer
Description For Formal Verification Engineer
Codasip is expanding in Greece and seeking a Formal Verification Engineer to enhance the use of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors. The role is based in Thessaloniki and reports to Alexandra Parasidi (Team Leader).
Key Responsibilities:
- Enable formal verification users to apply standard and advanced methodologies and techniques
- Contribute to tool development
- Focus on verifying RISC-V processors and components to improve deliverable quality
- Review and support FV test plans
Requirements:
- Passion for electronics, embedded SW, or programming and algorithms
- Knowledge of model checking and/or theorem proving
- 5+ years of experience with formal verification techniques
- Proficiency in HDL languages and property languages
- Knowledge of versioning tools (Git preferred)
- Practical Linux usage
- Scripting language proficiency (e.g., Python)
- Communicative English
Nice-to-haves:
- Interest in shaping the RISC-V future
- Experience with FV tools (QuestaFormal, OneSpin, Jasper, VC Formal)
Benefits:
- Work with RISC-V and innovative IoT processors
- Collaborate with experienced developers across Europe
- Freedom to innovate and contribute ideas
- Opportunity for career growth in a fast-growing company
Codasip offers a creative and collaborative work environment, encouraging cross-departmental collaboration and personal growth. The Greek design center hosts some of the best CPU design and verification engineers in Greece, with offices in Athens, Thessaloniki, and Heraklion. The role provides the chance to work with international teams and contribute to cutting-edge processor technology.
Responsibilities For Formal Verification Engineer
- Enable formal verification users to apply standard and advanced methodologies and techniques
- Contribute to the development of tools
- Focus on the verification of RISC-V processors and their components to raise the quality of deliverables
- Review and support FV test plans
Requirements For Formal Verification Engineer
- Passion for electronics, embedded SW, or programming and algorithms
- Knowledge of model checking and/or theorem proving
- Over 5 years of experience with formal verification techniques
- Knowledge of HDL languages (Verilog, SystemVerilog, VHDL) and property languages (SVA, PSL)
- Knowledge of versioning tools (Git preferred)
- Practical usage of Linux
- Proficiency in scripting languages, e.g. Python
- Communicative English
Benefits For Formal Verification Engineer
- Opportunity to work with RISC-V, computer architecture of the future
- Working on innovative IoT processors and unique processor optimization technology
- Participation in the whole development process from analysis to deployment
- Opportunity to collaborate with experienced developers located in France, the UK, Germany, Spain, Greece and the Czech Republic
- Receptivity to your own innovations and ideas
- Freedom and trust from Codasip management
- 50% tax reduction for the next 7 years for relocating to Greece
- Relocation support
Jobs Related To Codasip Formal Verification Engineer
