Chip Package Signal and Power Integrity Engineer

Google is a global technology company that develops innovative products and services used by millions worldwide.
$150,000 - $223,000
Backend
Mid-Level Software Engineer
In-Person
5,000+ Employees
5+ years of experience
Enterprise SaaS

Description For Chip Package Signal and Power Integrity Engineer

Google is seeking a Chip Package Signal and Power Integrity Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of a diverse team, you'll work on innovative hardware experiences that impact millions of users worldwide.

The position involves working closely with Chip Architects, ASIC Engineers, Physical Design teams, and other SI/PI Engineers. You'll be responsible for chip package design with signal/power integrity simulation and characterization at the chip, package, and system level. The role requires collaboration with various cross-functional teams, including Chip Design, System Design, software teams, and vendors.

Key responsibilities include performing Signal Integrity/Power Integrity analysis, developing next-generation IO interfaces, and contributing to chip-package-system co-design. You'll be involved in product definition and optimization of chip floorplan, power tree structure, and net lists for High Performance Computing based on 2.5D/3D package technology.

The ideal candidate should have a strong background in Electrical Engineering or related fields, with 5 years of industry experience in SI/PI field. Experience with post-silicon correlation, 2.5D/3D package design, and programming skills in Python, Matlab, and C++ is highly valued.

This position offers competitive compensation ranging from $150,000 to $223,000, plus bonus, equity, and comprehensive benefits. You'll be part of Google's Technical Infrastructure team, which is responsible for maintaining and developing the architecture that keeps Google's product portfolio running smoothly.

The role provides an opportunity to work on cutting-edge technology, contribute to innovative hardware solutions, and be part of a team that's pushing the boundaries of what's possible in silicon design. You'll have the chance to impact the performance and efficiency of Google's next generation of hardware experiences while working with some of the industry's best talents.

Last updated 16 days ago

Responsibilities For Chip Package Signal and Power Integrity Engineer

  • Contribute to chip-package-system co-design by performing Signal Integrity (SI)/Power Integrity (PI) analysis and optimization
  • Develop next generation IO interfaces (serdes, memory, D2D) considering IO PHY, SI/PI and physical design
  • Collaborate with chip design team, system design teams and suppliers to drive chip package SI/PI design target
  • Provide feedback on chip floorplan considering IP performance/package/system routability and SI/PI
  • Conduct post silicon validation and qualification of high speed interface for NPI

Requirements For Chip Package Signal and Power Integrity Engineer

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 5 years of industry experience in the SI/PI field
  • Experience in chip package SI/PI design for interconnections and advanced package design
  • Experience in post silicon correlation with models
  • Experience with 2.5D/3D package design
  • Experience in programming and data analysis with Matlab, Python, C++ and statistical tools

Benefits For Chip Package Signal and Power Integrity Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Equity
  • Medical Insurance
  • Dental Insurance
  • Vision Insurance
  • 401k
  • Equity

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