Google is seeking a Silicon Hardware Architecture Modeling Engineer for their TPU (Tensor Processing Unit) team within Google Cloud. This role is crucial in shaping the future of AI/ML hardware acceleration.
As a Silicon Hardware Architecture Modeling Engineer, you will:
- Work on Machine Learning (ML) workload characterization and benchmarking
- Conduct performance and power analysis and quantitatively evaluate proposals
- Develop architectural and microarchitectural models for quantitative analysis
- Collaborate with hardware design, software, compiler, ML model, and research teams for effective hardware/software codesign
- Propose capabilities and optimizations for next-generation TPUs and chip roadmap
The ideal candidate will have:
- A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience)
- 3 years of experience in computer architecture performance analysis and optimization (or a PhD in lieu of industry experience)
- Experience in developing software systems in C++
- Knowledge of processor design or accelerator designs and mapping ML models to hardware architectures
- Experience in applying computer architecture principles to solve open-ended problems
- Experience in analyzing workload performance and creating benchmarks
- Experience in hardware and software co-design
- Experience developing in Python
- Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog
This role offers the opportunity to drive cutting-edge TPU technology that powers Google's most demanding AI/ML applications. You'll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. Your contributions will impact products used by millions worldwide.
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