Silicon Senior Design Verification Engineer, TPU, Google Cloud
Description For Silicon Senior Design Verification Engineer, TPU, Google Cloud
Google is seeking a Senior Design Verification Engineer to join their TPU (Tensor Processing Unit) team within Google Cloud. This role is crucial in shaping the future of AI/ML hardware acceleration, working on cutting-edge TPU technology that powers Google's most demanding AI/ML applications. The position involves verifying complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
The successful candidate will be part of Google's Technical Infrastructure team, responsible for building and maintaining the architecture that powers Google's vast product portfolio. The role demands expertise in verification methodology, working with SystemVerilog and UVM, and experience with AI/ML Accelerators. You'll collaborate closely with design engineers, build efficient verification environments, and manage the full verification lifecycle from planning to coverage closure.
This is an exceptional opportunity to work with a diverse team at one of the world's leading tech companies, contributing to innovations that impact millions of users worldwide. The role offers the chance to work on state-of-the-art TPU technology while collaborating with top talent in the field. You'll be at the forefront of AI/ML hardware development, verifying designs that push the boundaries of what's possible in artificial intelligence and machine learning applications.
The position requires a strong background in electrical engineering, verification methodologies, and digital design, with the opportunity to work on projects that directly influence the future of AI/ML hardware acceleration. You'll be part of Google's commitment to maintaining and advancing its technical infrastructure, ensuring the highest standards of quality and performance in their AI/ML systems.
Responsibilities For Silicon Senior Design Verification Engineer, TPU, Google Cloud
- Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios
- Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools
- Identify and write all types of coverage measures for stimulus and corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Close coverage measures to identify verification holes and to show progress towards tape-out
Requirements For Silicon Senior Design Verification Engineer, TPU, Google Cloud
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 5 years of experience with verification methodology such as UVM/OVM/VMM
- 3 years of experience in the verification of IP designs such as CPU, Peripherals, PMU, etc.
- Experience with SystemVerilog, SVA and functional coverage
- Experience in verification of AI/ML Accelerators
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