Silicon SoC RTL Design/Integration Engineer

Google Cloud is seeking a Silicon SoC RTL Design/Integration Engineer to join their Hardware Testing Engineering team. This role is crucial in developing and maintaining Google's custom-designed machines that power one of the world's largest computing infrastructures.

As a member of the Digital Design team, you'll be instrumental in crafting architecture for current and future ASIC projects, focusing on networking solutions. You'll collaborate closely with verification and validation teams to ensure proper feature testing, while working with Google product teams to align microarchitecture designs with their objectives.

The position requires expertise in ASIC development, networking protocols, and design verification. You'll be working with cutting-edge technology, designing test equipment for prototypes, and developing protocols that scale across Google's global operations. The role offers the opportunity to work on high-impact projects that directly influence Google's hardware infrastructure.

You'll be part of the Technical Infrastructure team, responsible for keeping Google's networks running optimally and ensuring users have the best possible experience. The team takes pride in being "engineers' engineers" and approaches challenges with innovative solutions.

This is an excellent opportunity for someone with a background in electrical or computer engineering who wants to work on large-scale infrastructure projects. You'll be contributing to the development of next-generation technologies while working with some of the most advanced hardware systems in the industry.

The role offers the chance to work with diverse teams, influence product architecture, and be at the forefront of hardware innovation. You'll be part of Google's commitment to maintaining and advancing its world-class infrastructure while solving complex technical challenges that impact millions of users globally.