Verilog modeling, AMS and Verification Engineers

Qualcomm is a leading technology innovator pushing boundaries in next-generation experiences.
Backend
Mid-Level Software Engineer
In-Person
5+ years of experience
AI · Enterprise SaaS

Description For Verilog modeling, AMS and Verification Engineers

Qualcomm, a leading technology innovator, is seeking Verilog modeling, AMS and Verification Engineers to join their team in Bangalore, India. As a Qualcomm Hardware Engineer, you will be at the forefront of pushing the boundaries of what's possible in next-generation experiences and digital transformation.

In this role, you will plan, design, optimize, verify, and test electronic systems, bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and DSP systems that launch cutting-edge, world-class products. You'll collaborate with cross-functional teams to develop solutions and meet performance requirements.

Key responsibilities include:

  • Verilog modeling and verification of complex systems
  • Real number modeling of Analog blocks
  • Test bench development and AMS verification
  • Working with simulations of Analog blocks (Spectre, FastSpice, Finesim, etc.)
  • FE view modeling and characterization of mixed signal / analog IPs
  • Writing behavioral Verilog/Verilog AMS/real number models of analog blocks
  • Developing and maintaining self-checking Test-benches and Test-Plans
  • SV modeling and testbench development for verification against transistor level netlist

The ideal candidate will have:

  • A degree in Computer Science, Electrical/Electronics Engineering, or a related field
  • 5+ years of experience with Verilog, SV, and Real number modeling of Analog blocks
  • Proficiency in Verilog modeling and verification
  • Experience with simulators such as VCS
  • Strong skills in Tcl/Perl/Skill Scripting for automation
  • Excellent communication skills and the ability to work in a team

Qualcomm offers a world-class benefits package, including comprehensive health coverage, wealth-building programs, and resources for personal and professional development. Join us in creating a smarter, connected future for all by applying your skills and expertise to groundbreaking hardware engineering projects.

Last updated 5 days ago

Responsibilities For Verilog modeling, AMS and Verification Engineers

  • Plan, design, optimize, verify, and test electronic systems
  • Bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems
  • Collaborate with cross-functional teams to develop solutions and meet performance requirements

Requirements For Verilog modeling, AMS and Verification Engineers

Java
Python
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience
  • OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience
  • OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience
  • 5+ experience with Verilog, SV, Real number modeling of Analog blocks, Expertise in Test bench development and AMS verification
  • Experience with simulations of Analog blocks like Spectre, FastSpice, Finesim etc
  • Self-motivation, teamwork, and strong communication skills
  • Tcl/Perl/Skill Scripting aware for automation in day to day execution
  • FE view modeling / Characterization –Verilog behavior modeling, model verification of mixed signal / analog IPs like SERDES analog, ADC/DAC, PLLs, etc
  • Functional understanding of mixed signal / analog IPs for Verilog modeling, System Verilog
  • Proficiency in Verilog modeling and verification
  • Write behavioral Verilog/Verilog AMS/real number models of analog blocks
  • Developing and maintaining self-checking Test-benches/Test-Plans
  • SV modeling and testbench development for verification against transistor level netlist
  • Proficiency in Simulators such as VCS etc

Benefits For Verilog modeling, AMS and Verification Engineers

Medical Insurance
Dental Insurance
Vision Insurance
401k
Education Budget
  • Health benefits
  • Wealth-building programs
  • Self and family resources
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorships

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