Senior ASIC TOP Floorplan Design Engineer

NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC's and GPU's. This position offers a unique opportunity to craft and influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

What you will be doing:

• Working with architects, design leads, physical design leads and package leads to develop and craft and optimize floorplans during early chip development.
• Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities.
• Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions.
• Build tools and improve existing infrastructure to optimize chip area and speed of execution.

Requirements:

• Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
• At least 3+ years of relevant work experience.
• Deep hardware engineering background with a concentration in VLSI and/or Computer Architecture.
• Experience in Verilog, System Verilog or similar HVL.
• Experience with CAD and physical design methodologies, chip floorplan, power/clock distribution, packaging, P&R and timing closure.
• Strong communication and interpersonal skills.
• Python, Perl and C/C++ programming language experience.

NVIDIA is widely considered to be one of the technology world's most desirable employers. Our products are leading the way with groundbreaking developments in Artificial Intelligence, Autonomous Driving, High-Performance Computing and Visualization.