ASIC Design Verification Engineer Interview Experience - Indianola, Mississippi
Process
First step: a phone contact (probably screening) with the recruiter or hiring manager.
Then a first technical interview round.
Then two more technical rounds (so a total of at least 3 technical rounds) before HR.
I did not pass the first technical round.
Questions
You have an asynchronous FIFO (in RTL) to transfer data between two clock domains (Clk_A and Clk_B). Describe how you would verify this FIFO.
What testbench components would you build?
What corner cases would you include?
How would you write assertions?
How would you verify that metastability / synchronization issues are handled?
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Interview Statistics
The following metrics were computed from 1 interview experience for the AMD ASIC Design Verification Engineer role in Indianola, Mississippi.
Success Rate
AMD's interview process for their ASIC Design Verification Engineer roles in Indianola, Mississippi is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very good feelings for AMD's ASIC Design Verification Engineer interview process in Indianola, Mississippi.
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