The interview involved a very long move from SV to C++ to formal verification.
It was incredibly long and intense, which I didn't expect given that I applied for a "trash grad" position. This was the first interview, and it was already highly technical, lasting over an hour.
Design a Finite State Machine (FSM) to detect a certain sequence of numbers.
The following metrics were computed from 1 interview experience for the AMD Design Verification Engineer role in Boston, Massachusetts.
AMD's interview process for their Design Verification Engineer roles in Boston, Massachusetts is extremely selective, failing the vast majority of engineers.
Candidates reported having very negative feelings for AMD's Design Verification Engineer interview process in Boston, Massachusetts.