Received an interview invitation from the Markham location.
Had a brief call with HR, followed by a Teams meeting with the engineer and team lead.
Questions focused on designing various IPs using Verilog.
What is a state machine?
The following metrics were computed from 10 interview experiences for the AMD Design Verification Engineer role in Canada.
AMD's interview process for their Design Verification Engineer roles in Canada is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for AMD's Design Verification Engineer interview process in Canada.