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Design Verification Engineer Interview Experience - Markham, Canada

March 24, 2025
Positive ExperienceNo Offer

Process

I was not well prepared. It was a basic Q&A related to my current role and some basic OSI questions. Also, the interviewer was great; he gave me time to understand the question and helped me with hints.

Questions

A chip was given which performs the following operations on 8-bit values:

  • (001) Addition
  • (010) Subtraction
  • (011) Multiplication
  • (100) Division

It can store 20 operands at a time in a stack and has 2 bits for error handling:

  • Arithmetic overflow
  • Stack overflow
  1. The question was to find out the end cases and possible errors and how they can be handled in Verilog testbenches.
  2. Also, how to write those test cases?

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Interview Statistics

The following metrics were computed from 5 interview experiences for the AMD Design Verification Engineer role in Markham, Canada.

Success Rate

0%
Pass Rate

AMD's interview process for their Design Verification Engineer roles in Markham, Canada is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive60%
Neutral20%
Negative20%

Candidates reported having very good feelings for AMD's Design Verification Engineer interview process in Markham, Canada.

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