Verification Engineer Interview Experience - Bengaluru, Karnataka
Process
There were a total of 6 rounds of interviews, starting with SystemVerilog, UVM, projects, analytical, and SOC level. I did not find it very difficult.
The analytical questions were tricky, but enough time was given to answer each.
Questions
UVM question:
Assuming a UVM environment has 3 different agents, each with scope to their own interfaces.
When driving wrong stimuli on agent1, an error pin is asserted on interface3. The monitor of agent2 sees this.
Soon after the error pin assertion, agent2 should perform a read transaction.
How can you ensure that agent2 drives a read transaction for every wrong stimulus from agent1, as seen by the monitor of agent2?
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Interview Statistics
The following metrics were computed from 2 interview experiences for the AMD Verification Engineer role in Bengaluru, Karnataka.
Success Rate
AMD's interview process for their Verification Engineer roles in Bengaluru, Karnataka is fairly selective, failing a large portion of engineers who go through it.
Experience Rating
Candidates reported having very good feelings for AMD's Verification Engineer interview process in Bengaluru, Karnataka.
AMD Work Experiences
- 5.0Great Company, No DownsidesVerification Engineer • Current EmployeeBengaluru, Karnataka, IndiaSeptember 2, 2024Pros: It is a very good company.Cons: No downsides observed so far.
- 5.0Great Team, Good FlexibilityVerification Engineer • Current EmployeeBengaluru, Karnataka, IndiaFebruary 6, 2024Pros: Flexible, hybrid working mode; good teammates.Cons: No problems so far. 3 days have to go to the office.
- 4.0Good work cultureVerification Engineer • Former EmployeeBengaluru, Karnataka, IndiaMay 15, 2023Pros: Good work culture and good work.Cons: Nothing much to add.
AMD Interview Questions
