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Design Verification Engineer Interview Experience - India

May 23, 2025
Neutral ExperienceNo Offer

Process

They explain what will be our role and expectation from us and why you are changing job and reason ? . Then they continue with a technical interview by giving design logic and write a tb_top code

Questions

NOC : One side we have 3 AHB masters, 1 APB master and other side 3 APB slaves,0x0000_0000 to 0x_1000_0000 1st APB SLAVE0x_4000_0000 to 0x_8000_0000 2nd slaveoxC000_0000 to 0xFFFF_FFFF 3rd slaveIn addition to above imagine AHB master number 3 and APB master will provide error response for address range oxC000_0000 to 0xFFFF_FFFF.

Note AHB master number 1 and 2 can still access address range oxC000_0000 to 0xFFFF_FFFF.

Write a top_tb for this design ?What are the coverpoints or bins you can write ?What is difference between functional coverage and code coverage? If functional coverage is there, why code coverage is required?

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Analog Devices Design Verification Engineer role in India.

Success Rate

0%
Pass Rate

Analog Devices's interview process for their Design Verification Engineer roles in India is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Analog Devices's Design Verification Engineer interview process in India.

Analog Devices Work Experiences