The process involves a technical interview, followed by a round with multiple 45-minute technical interviews in a row. A question posed was to implement a stimulus plan and environment for what appeared to be a standard pipelined processor.
The processor would execute instructions such as ADD, SUB, and MUL. It also features a read data cache and a write data cache.
Multiple threads can execute atomically as a SIMD group, and you can run multiple SIMD groups in parallel.
How to implement a stimulus plan.
Computer architecture concepts.
The following metrics were computed from 8 interview experiences for the Apple Design Verification role in United States.
Apple's interview process for their Design Verification roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Apple's Design Verification interview process in United States.