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Hardware Verification Engineer Interview Experience - Cupertino, California

January 1, 2013
Negative ExperienceNo Offer

Process

I was officially contacted by one of Apple's recruiters on LinkedIn. After forwarding my resume, I had two rounds of phone screening, followed by an onsite interview. The onsite interview consisted of six 1-on-1 sessions lasting about 50 minutes. Most of the interview questions were short programming quizzes.

Questions

Describe memory BIST architecture, the March algorithm, and MATS test.

String parsing questions to process and filter Verilog code encased in ifdef/ifndef.

How to set up a testbench for scan debug verification and maximize test coverage for it.

The engineering manager with whom I ate asked me about my ethnicity. Although I grew up in California, he kept trying to connect with the interests of his neighbor, who happened to be of the same ethnicity. The questions were along the lines of: "My neighbor, they like to play tennis. Do you like tennis? Do you follow this tennis player from ?"

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Interview Statistics

The following metrics were computed from 3 interview experiences for the Apple Hardware Verification Engineer role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their Hardware Verification Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive67%
Neutral0%
Negative33%

Candidates reported having very good feelings for Apple's Hardware Verification Engineer interview process in Cupertino, California.

Apple Work Experiences