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SoC Design Verification Interview Experience - Cupertino, California

February 1, 2017
Positive ExperienceNo Offer

Process

The process involved a phone and then an onsite interview in Cupertino.

The process took more than a month.

First interview: The manager asked three puzzles, which were answered almost completely.

Second interview: An engineer asked questions about constrained random verification and reviewed my resume.

Onsite interviews: I was told there would be six interviews. If all went well after that, there would be a meeting with the manager; otherwise, it would be a rejection. All six interviews went well, and I then met for a seventh interview, which lasted 15 minutes.

I received an email a week later stating the position was mismatched and that there would be no offer. It is a rare case to receive a rejection after a seventh onsite interview.

Questions

Random number generations, assertions, constraints, etc.

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Apple SoC Design Verification role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their SoC Design Verification roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Apple's SoC Design Verification interview process in Cupertino, California.

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