Soc Design Verification Engineer Interview Experience - Santa Clara, California
Process
This was the first round for entry-level, i.e., recent graduate positions. The interview lasted for 45 minutes.
The first 20 minutes were strictly resume and project discussion.
The next 15 minutes were spent on the following questions:
Questions
Write a scoreboard in SV or UVM for a simple ALU. The ALU has an 8-bit input that changes value every clock cycle. The output should be equal to the sum of the previous 5 inputs.
Was this helpful?
Interview Statistics
The following metrics were computed from 1 interview experience for the Apple Soc Design Verification Engineer role in Santa Clara, California.
Success Rate
Apple's interview process for their Soc Design Verification Engineer roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very good feelings for Apple's Soc Design Verification Engineer interview process in Santa Clara, California.
Apple Work Experiences
- 4.0Good Pay, Long HoursSoftware Engineer ICT3 • Current EmployeeSanta Clara, California, United StatesSeptember 22, 2024Pros: Multinational company: exposure, experience, networking, pay, benefits.Cons: Handwork, more working hours, work-life balance, politics.
- 4.0Best WorkplaceDevOps Engineer • Former EmployeeSanta Clara, California, United StatesJune 14, 2021Pros: Best workplace to workCons: Doesn't have any cons. The workplace is good.
- 4.0Good place to workASIC Design Verification Engineer • Current EmployeeSanta Clara, California, United StatesMarch 29, 2022Pros: Competitive pay and benefits Dental and vision ESPP Medical plansCons: Slow growth. Difficult to get recognition.
Apple Interview Questions
