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SoC Verification Engineer Interview Experience - Cupertino, California

March 1, 2024
Positive ExperienceNo Offer

Process

I interviewed for an SoC Verification Engineer role at Apple in Cupertino for an entry-level position (MS+0) in March 2024. It was a 45-minute phone screen interview. The first 15 minutes were solely dedicated to discussing my resume and most recent project (in my case, UVM-based verification). After that, I was asked to code a scoreboard in UVM or SV. The interview was very nice and supportive. Overall, a positive experience.

Questions

Write a scoreboard for verifying the average of 5 previous values, where the data is coming sequentially (i.e., 1 value at every posedge of clk).

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Interview Statistics

The following metrics were computed from 3 interview experiences for the Apple SoC Verification Engineer role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their SoC Verification Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive67%
Neutral33%
Negative0%

Candidates reported having very good feelings for Apple's SoC Verification Engineer interview process in Cupertino, California.

Apple Work Experiences