Really bad experience.
The interviewer took pride in asking stupid, tricky questions and seeing candidates get tricked. They seemed to enjoy making fun of candidates.
They are looking for people who can recite the entire SystemVerilog spec instead of someone who can do actual work.
evaluation regions semaphore virtual interfaces modport uvm
The following metrics were computed from 6 interview experiences for the Apple SoC Verification Engineer role in United States.
Apple's interview process for their SoC Verification Engineer roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having negative feelings for Apple's SoC Verification Engineer interview process in United States.