Interesting work, good coworkers, good pay and benefits
Interesting work, good coworkers, good pay and benefits
Stable, interesting problems, plenty of available resources to do it right, and a solid set of pay and benefits. Work with some of the smartest folks around, so there's lots to learn.
Could theoretically make more or get better WLB or benefits elsewhere, but probably not all at the same time. Lots of specialization among teams, so you don't necessarily get the chance to learn as much skill variety as you would at a smaller company where you have to do PCB, SW, automation, and testing yourself.
The disclosure system closes off a lot of interesting education to people in other teams.
Forced in-office for all isn't needed or helpful for most, since so much of the work is asynchronous anyway. Too much information silo-ing makes skill building harder for earlier engineers. More hotel cubes in whatever office is convenient, regardless of team, would be very helpful for many. Overall, still good.
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Apple Interview Questions
Apple Interview Experiences
Silicon Validation Engineer
I went through a shared IDE with the interviewer. We walked through different questions together as I coded. I was allowed a choice in the programming language I preferred and answered basic LeetCode questions.
Silicon Validation Engineer
5 rounds of interview starting at 1 p.m. and ended around 5 p.m. Three rounds of them are writing Verilog/System Verilog, one for C/C++, and one as behavioral questions. Questions are not difficult.
Silicon Validation Engineer
Overall positive experience. They were interested in my hardware and debugging experience. The process didn't take long. The final in-person interview was with 5 people, an hour each.
Silicon Validation Engineer
United StatesOctober 3, 2024I went through a shared IDE with the interviewer. We walked through different questions together as I coded. I was allowed a choice in the programming language I preferred and answered basic LeetCode questions.
Silicon Validation Engineer
United StatesMarch 1, 20225 rounds of interview starting at 1 p.m. and ended around 5 p.m. Three rounds of them are writing Verilog/System Verilog, one for C/C++, and one as behavioral questions. Questions are not difficult.
Silicon Validation Engineer
United StatesApril 13, 2021Overall positive experience. They were interested in my hardware and debugging experience. The process didn't take long. The final in-person interview was with 5 people, an hour each.
