Can be divided into two parts, the phone interview, and the final face to face interview.

Both of them were VERY technical in nature and competency questions were absent. Questions related directly to Logic circuits, Logic Systems, VLSI, Solid state electronics and transistor physics. The interview itself is very grueling, in that questions are asked till you are at the very end of your knowledge and put your hands up and say that you don't know anything about what they have asked, and that point is used as a measure of how well you know your stuff. I thought I did terribly on both occasions, in that I did reach points at which I could not answer a question anymore, but I had in fact done quite well in actually arriving at that point.

The question was related to the effect of clock gate cloning and de-cloning.