Taro Logo

Verification Engineer Interview Experience - United Kingdom

May 17, 2023
Neutral ExperienceNo Offer

Process

During the interview we mainly talked about creating verification environments using UVM. Additionally there were some tricky algorithm questions in System Verilog.

There were also some random questions about computer architecture, like cache coherency.

Questions

Basic UVM questions, advanced SystemVerilog

Was this helpful?

Interview Statistics

The following metrics were computed from 5 interview experiences for the Arm Verification Engineer role in United Kingdom.

Success Rate

20%
Pass Rate

Arm's interview process for their Verification Engineer roles in the United Kingdom is very selective, failing most engineers who go through it.

Experience Rating

Positive40%
Neutral60%
Negative0%

Candidates reported having very good feelings for Arm's Verification Engineer interview process in United Kingdom.

Arm Work Experiences