First two rounds went great. I was asked about mbist, atpg, scan, jtag, fault models etc.
The last round was horrible. The interviewer didn’t have their camera on and cut the interview a half hour short. Also didn’t give me a real chance and ask anything DFT related.
Given this circuit, what tests do you need to test different stuck-at faults?
The following metrics were computed from 2 interview experiences for the Astera Labs Dft Engineer role in United States.
Astera Labs's interview process for their Dft Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having mixed feelings for Astera Labs's Dft Engineer interview process in United States.