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Processor Verification Engineer Interview Experience - San Jose, California

March 1, 2014
Neutral ExperienceNo Offer

Process

Two phone interviews.

Both had similar questions asked by different people:

  • Pipeline, stages, hazards, how to avoid them.

  • How to implement these.

  • Register forwarding implementation.

  • Register renaming implementation.

  • Why not many stages in a pipeline.

  • Retire time.

  • Cache LRU algorithm?

  • Cache sets and ways given. Calculate the cache size.

  • Physical to VA translation!!

  • Assembly knowledge? Give pseudo-code to reverse data in an 8-byte register.

Second phone screen has almost similar questions.

Graphics related questions:

  • Explain various stages of a GPU pipeline.
  • What happens.
  • What's vertex/pixel?

Questions

Questions were asked from a design point of view.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Broadcom Processor Verification Engineer role in San Jose, California.

Success Rate

0%
Pass Rate

Broadcom's interview process for their Processor Verification Engineer roles in San Jose, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Broadcom's Processor Verification Engineer interview process in San Jose, California.

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