I had a phone interview for a Verification Intern position with the Digital Video Tech team. The hiring manager asked me about my resume, specifically my academic projects.

He started with some basic Verilog concepts, such as setup and hold times, and a divide-by-2 and divide-by-3 circuit. Then, he moved on to SystemVerilog, discussing assertions, interfaces, mailboxes, scoreboards, code coverage, and functional coverage.

He also reviewed all my ASIC academic projects thoroughly. He focused on the testbench and asked questions about a 20-line code snippet, including line coverage.

My resume also listed a video encoder project. He spent about 20 minutes grilling me on motion estimation and its algorithms.

Two weeks later, I received the offer.

The most difficult question was the line coverage question. He also asked very detailed questions about my project, related to the test bench.