After doing an internship for 10 months, I interviewed for a full time role in another team.
There were overall 4 rounds of interviews.
In round one questions about scripting language, makefiles, parasitics, Electromigration and IR drop. ( acc to my resume), Previous internship experiences.
Round 2 with the manager : MOSFET, Digital electronics etc.
Round 3 with Director: Behavioural round.
Round 4 : Again a technical round covering all the things like Digital Electronics, layout, ASIC design flow, DRC, LVS. etc.
With sine wave at gate of inverter, in detail answer, mode in which each pMOS and nMOS will operate along the sine wave input.
Some questions on file handling using Tcl language.
What are parasitics? What is EMIR? Why they cause reliability issues etc (acc to my resume)
The following metrics were computed from 3 interview experiences for the Cadence Design Systems Product Validation Engineer role in Noida, India.
Cadence Design Systems's interview process for their Product Validation Engineer roles in Noida, India is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having very good feelings for Cadence Design Systems's Product Validation Engineer interview process in Noida, India.