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ASIC Design Verification Engineer Interview Experience

May 1, 2021
Neutral ExperienceNo Offer

Process

It took over three months. I applied a long time back and received a surprise email from HR. It was a video call for 30 minutes with technical questions.

The process is simple: two video rounds and four to five on-site interviews. The panel round is also online.

There is a special bar set by the company. Candidates who cross that score get hired, and it is a solo war. There are six different aspects to consider:

  • Resume
  • Interview
  • Google form (which you will fill)
  • Google profile
  • One more aspect.

Questions

Questions asked:

  • SV functions: Can they take fork_join? (y/n)
  • Finding the bit to represent 4069: Is it 2^x or log base 2 of 32?
  • Malloc()
  • Writing an integer queue: rand int q[$];
  • Tasks and functions

UVM:

  • Sequencer-Driver connection
  • Phasing names (3)
  • Base class related questions

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Interview Statistics

The following metrics were computed from 4 interview experiences for the Google ASIC Design Verification Engineer role in United States.

Success Rate

25%
Pass Rate

Google's interview process for their ASIC Design Verification Engineer roles in the United States is very selective, failing most engineers who go through it.

Experience Rating

Positive25%
Neutral50%
Negative25%

Candidates reported having mixed feelings for Google's ASIC Design Verification Engineer interview process in United States.

Google Work Experiences