This was for a 6-month co-op. I had one phone call interview, with no further rounds in the selection criteria. They gave a week's notice before the call.
The interview was a mixture of technical and non-technical questions and lasted for 30 minutes.
MOSFET modes
NOR gate logic
Interconnect delay
RC delay
Logic design using De Morgan's theorems
Difference between NAND and NOR gates
Difference between latches and flip-flops
The following metrics were computed from 1 interview experience for the Intel Component Debug Engineer role in Atlanta, Georgia.
Intel's interview process for their Component Debug Engineer roles in Atlanta, Georgia is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Intel's Component Debug Engineer interview process in Atlanta, Georgia.