The interview was conducted over the phone and lasted for an hour. The interviewee asked a series of questions covering VLSI, digital design, metal layer properties, C-CMOS gates, and basic coding.
He also provided a few clues that aided in reaching the correct answers. There were a couple of logical reasoning questions as well.
Asked a couple of questions related to coding:
How many NAND gates are used to design a NOR gate of 2 inputs?
The following metrics were computed from 1 interview experience for the Intel Design Automation Engineer role in New York, New York.
Intel's interview process for their Design Automation Engineer roles in New York, New York is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Intel's Design Automation Engineer interview process in New York, New York.