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Engineering Interview Experience - Portland, Oregon

November 1, 2010
Neutral ExperienceGot Offer

Process

What is the difference between combinational and sequential logic?

Draw the cross-section of a MOSFET.

What does it mean for a FET to be in saturation, and how do you bias the device as such?

What are some ways devices can fail?

Some simple statistics/probability questions.

Questions

Draw the cross-section of a MOSFET.

What is the saturation regime?

How do you bias the device as such?

Where is the bulk connection?

What does it do?

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Intel Engineering role in Portland, Oregon.

Success Rate

50%
Pass Rate

Intel's interview process for their Engineering roles in Portland, Oregon is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Intel's Engineering interview process in Portland, Oregon.

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