The interview process took two weeks.
First was a 30-minute phone interview, followed by one onsite interview with four rounds.
The process happened faster as I was in Arizona itself. The manager was very calm and kind, and the panel was a very positive set of people.
Traffic light design in Verilog code. Pipelining. One round on System Verilog and coding. One round on analyzing architecture and related data. Sequence detector. Optimizing the given Verilog code. Circuit diagram from the code (what will it synthesize to). Array questions in Perl.
The following metrics were computed from 2 interview experiences for the Intel Graphics Hardware Engineer role in Chandler, Arizona.
Intel's interview process for their Graphics Hardware Engineer roles in Chandler, Arizona is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Intel's Graphics Hardware Engineer interview process in Chandler, Arizona.