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Post Silicon Validation Engineer Interview Experience - Folsom, California

August 1, 2012
Neutral ExperienceGot Offer

Process

Basic questions.

Had 4 rounds:

  • Software
  • Computer Architecture
  • Debugging
  • HR

Software:

  • Basic definitions of static, friend, virtual, etc.
  • Couple of programs:
    • To find if a given number is a power of 2.
    • Linked list.
  • Advantages and disadvantages.

Architecture:

  • Divide by 2 counter.
  • Cache coherency protocol.
  • To draw a computer system.

Debugging:

  • Simple debugging questions related to project and internship work.

Questions

All simple questions.

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Intel Post Silicon Validation Engineer role in Folsom, California.

Success Rate

50%
Pass Rate

Intel's interview process for their Post Silicon Validation Engineer roles in Folsom, California is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Intel's Post Silicon Validation Engineer interview process in Folsom, California.

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