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Post Silicon Validation Engineer Interview Experience - Folsom, California

May 1, 2012
Positive ExperienceGot Offer

Process

I had two phone interviews.

The first one was focused on my resume.

The second one was about my familiarity with MS Excel, Signal Integrity, and Programming.

I was then asked to come for a one-on-one on-site interview, which lasted about an hour.

Questions

Convert a decimal number into binary form.

Find the frequency of the wave displayed at the O-scope.

Difference between while and do-while loops.

What is the 3rd harmonic?

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Intel Post Silicon Validation Engineer role in Folsom, California.

Success Rate

50%
Pass Rate

Intel's interview process for their Post Silicon Validation Engineer roles in Folsom, California is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Intel's Post Silicon Validation Engineer interview process in Folsom, California.

Intel Work Experiences