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Pre-Silicon Validation and Verification Engineer Intern Interview Experience

March 25, 2014
Neutral ExperienceNo Offer

Process

I received an email from them asking if I was still interested in the position.

I had a first-round phone interview a week later, and was immediately notified to schedule a second-round, on-site interview.

Questions

Nothing was unexpected.

There were very minimal behavioral questions.

All the technical questions were regarding computer architecture subjects.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel Pre-Silicon Validation and Verification Engineer Intern role in United States.

Success Rate

0%
Pass Rate

Intel's interview process for their Pre-Silicon Validation and Verification Engineer Intern roles in the United States is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Intel's Pre-Silicon Validation and Verification Engineer Intern interview process in United States.

Intel Work Experiences