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Pre-Silicon Verification Interview Experience

May 20, 2017
Positive ExperienceNo Offer

Process

There were two rounds, one in each week.

In the first round, I was asked about projects and questions on related topics like UVM, SystemVerilog, and coverage. Other questions were on logic design, C++, Verilog, and computer architecture, such as virtual memory.

In the second round, the interview was conducted by the team lead. Questions focused on projects (in detail), a puzzle question, and a design question on a priority encoder.

Questions

Design a 16-to-4 priority encoder using a 4-to-2 priority encoder.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel Pre-Silicon Verification role in United States.

Success Rate

0%
Pass Rate

Intel's interview process for their Pre-Silicon Verification roles in the United States is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Intel's Pre-Silicon Verification interview process in United States.

Intel Work Experiences