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Verification Engineer Interview Experience - United States

July 20, 2022
Positive ExperienceNo Offer

Process

One round: telephonic technical screening.

Five rounds: onsite (each call 45 minutes).

Testing/verification, universal verification methodology, SystemVerilog constraints, assertions, C programming and data structures, logical puzzles skills.

  • How to swap 3 numbers
  • How to find the 3 greatest numbers in an array

Questions

SystemVerilog constraints, C programs, and data structures

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Interview Statistics

The following metrics were computed from 13 interview experiences for the Intel Verification Engineer role in United States.

Success Rate

46%
Pass Rate

Intel's interview process for their Verification Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive62%
Neutral38%
Negative0%

Candidates reported having very good feelings for Intel's Verification Engineer interview process in United States.

Intel Work Experiences