Power and performance
Power and performance
Knowledgeable people around. Good work is going on with next-generation architecture.
Redundant work going on in teams.
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Intel Interview Questions
Intel Interview Experiences
Post Silicon Validation Engineer
The interview took place from 9 AM to 3 PM. I had lunch with recruiters. The questions covered: * Computer architecture * Assembly languages (8086) * C language (linked lists and pointers) * Low power VLSI * Questions related to my projects and the
Post Silicon Validation Engineer
Basic questions. Had 4 rounds: * Software * Computer Architecture * Debugging * HR Software: * Basic definitions of static, friend, virtual, etc. * Couple of programs: * To find if a given number is a power of 2. * Linked
Post Silicon Validation Engineer
It was offline for 4 rounds of interviews. In the first round, they asked about the basics of Digital Electronics, such as: * Drawing a half-adder and full-adder circuit. * Designing an SR latch. * Drawing a 3-bit counter.
Post Silicon Validation Engineer
Austin, Texas, United StatesOctober 28, 2012The interview took place from 9 AM to 3 PM. I had lunch with recruiters. The questions covered: * Computer architecture * Assembly languages (8086) * C language (linked lists and pointers) * Low power VLSI * Questions related to my projects and the
Post Silicon Validation Engineer
Folsom, California, United StatesAugust 1, 2012Basic questions. Had 4 rounds: * Software * Computer Architecture * Debugging * HR Software: * Basic definitions of static, friend, virtual, etc. * Couple of programs: * To find if a given number is a power of 2. * Linked
Post Silicon Validation Engineer
Bengaluru, Karnataka, IndiaOctober 28, 2024It was offline for 4 rounds of interviews. In the first round, they asked about the basics of Digital Electronics, such as: * Drawing a half-adder and full-adder circuit. * Designing an SR latch. * Drawing a 3-bit counter.
