It's a good company to work with. They take care of work-life balance
It's a good company to work with. They take care of work-life balance
Multiple facilities they provide, wrt health care & 401k. They help to explore other domains of work.
Learning growth is slow and a less risk-taking attitude.
Can put more efforts on innovation and learning growth of employees.
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Intel Interview Questions
Intel Interview Experiences
Post Silicon Validation Engineer
Basic questions. Had 4 rounds: * Software * Computer Architecture * Debugging * HR Software: * Basic definitions of static, friend, virtual, etc. * Couple of programs: * To find if a given number is a power of 2. * Linked
Post Silicon Validation Engineer
I had two phone interviews. The first one was focused on my resume. The second one was about my familiarity with MS Excel, Signal Integrity, and Programming. I was then asked to come for a one-on-one on-site interview, which lasted about an hour.
Post Silicon Validation Engineer
It was offline for 4 rounds of interviews. In the first round, they asked about the basics of Digital Electronics, such as: * Drawing a half-adder and full-adder circuit. * Designing an SR latch. * Drawing a 3-bit counter.
Post Silicon Validation Engineer
Folsom, California, United StatesAugust 1, 2012Basic questions. Had 4 rounds: * Software * Computer Architecture * Debugging * HR Software: * Basic definitions of static, friend, virtual, etc. * Couple of programs: * To find if a given number is a power of 2. * Linked
Post Silicon Validation Engineer
Folsom, California, United StatesMay 1, 2012I had two phone interviews. The first one was focused on my resume. The second one was about my familiarity with MS Excel, Signal Integrity, and Programming. I was then asked to come for a one-on-one on-site interview, which lasted about an hour.
Post Silicon Validation Engineer
Bengaluru, Karnataka, IndiaOctober 28, 2024It was offline for 4 rounds of interviews. In the first round, they asked about the basics of Digital Electronics, such as: * Drawing a half-adder and full-adder circuit. * Designing an SR latch. * Drawing a 3-bit counter.
