Excellent benefits. Lower cost of living.
Challenging times. Tough competition from AMD and Apple.
Four parts: 1. One about Verilog coding: reading and telling what the code is about, and fixing code. 2. One about computer architecture: the traditional pipeline processor. 3. One about algorithms: how would you speed up file I/O and processing?
The first interview was psychological. The second interview was technical, focusing on my research. The third interview was on-site. On-site consisted of 30-minute interviews with current CMP engineers and the hiring manager, and lasted from 7 a.m.
40-minute seminar followed by lunch and an intense series of seven interviews. Interviewers were friendly and wanted to understand your technical abilities and your ability to survive a hectic on-call schedule.
Four parts: 1. One about Verilog coding: reading and telling what the code is about, and fixing code. 2. One about computer architecture: the traditional pipeline processor. 3. One about algorithms: how would you speed up file I/O and processing?
The first interview was psychological. The second interview was technical, focusing on my research. The third interview was on-site. On-site consisted of 30-minute interviews with current CMP engineers and the hiring manager, and lasted from 7 a.m.
40-minute seminar followed by lunch and an intense series of seven interviews. Interviewers were friendly and wanted to understand your technical abilities and your ability to survive a hectic on-call schedule.