Not good management
Not good management
Nothing much to write here.
Worst management which needs to improve.
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Intel Interview Experiences
SoC Verification Engineer
The interview focused heavily on UVM concepts, with no LeetCode-style problems. The interviewer provided good insight into the team. I was stumped on a few difficult questions, however. I would apply again, possibly for a role with less UVM focus.
SoC Verification Engineer
I was interviewed for a co-op position, for which I applied a long time ago. This position is 6-9 months in duration. The interview was mostly based on my resume, with follow-up questions on how to verify my RTL design if I hadn't written the RTL co
SoC Verification Engineer
The interview will be based on course projects, basics of digital electronics, Digital VLSI design, CAD for IC design, VLSI design flow steps, etc., and basics of MOSFET devices. There was no written test.
SoC Verification Engineer
United StatesMay 4, 2021The interview focused heavily on UVM concepts, with no LeetCode-style problems. The interviewer provided good insight into the team. I was stumped on a few difficult questions, however. I would apply again, possibly for a role with less UVM focus.
SoC Verification Engineer
San Jose, California, United StatesJune 1, 2023I was interviewed for a co-op position, for which I applied a long time ago. This position is 6-9 months in duration. The interview was mostly based on my resume, with follow-up questions on how to verify my RTL design if I hadn't written the RTL co
SoC Verification Engineer
IndiaAugust 30, 2019The interview will be based on course projects, basics of digital electronics, Digital VLSI design, CAD for IC design, VLSI design flow steps, etc., and basics of MOSFET devices. There was no written test.
