Microchip Technology

CAD Engineer Interview Experience - Chandler, Arizona

August 1, 2010

Positive ExperienceGot Offer

Process

I was asked basic digital circuits questions and some logic problem-solving problems, followed by HSPICE netlist-related questions.

Questions

How do you define a subroutine in a netlist?

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Interview Statistics

The following metrics were computed from 3 interview experiences for the Microchip Technology CAD Engineer role in Chandler, Arizona.

Success Rate

33%

Pass Rate

Microchip Technology's interview process for their CAD Engineer roles in Chandler, Arizona is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive33%

Neutral67%

Negative0%

Candidates reported having very good feelings for Microchip Technology's CAD Engineer interview process in Chandler, Arizona.