I got the interview through my school's internship program. The interview took place on campus, and the interviewer was an alumnus of my school. The interviewer described the company and the job position, asked about why I applied and my goals. They also asked about what I knew about the company and if I had any questions about it.

What will the total signal delay be when passing through these logic gates?

If we added a capacitor between these two logic gates, how would this affect the signal delay?

Draw a graph of the current in a capacitor against time, where t = 0 represents when the circuit opens.