I got a phone interview for an ASIC design position. The questions asked were from my resume, pipelining concepts, CMOS, inverter sizing, digital logic, and timing violations (setup, hold).
They tested the basics and gave me ample time to respond.
What are CMOS characteristics?
Which gate would you prefer in a design: NAND or NOR? Why?
The following metrics were computed from 1 interview experience for the Nvidia ASIC Design Engineer role in Hillsboro, Oregon.
Nvidia's interview process for their ASIC Design Engineer roles in Hillsboro, Oregon is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Nvidia's ASIC Design Engineer interview process in Hillsboro, Oregon.