It started with a first call with the team manager, where he asked about basic multiplier and FSM questions.
Second round with a team member involved latch inference questions and a palindrome problem.
Design a two-bit single-cycle multiplier.
Write code to check if a string is a palindrome.
Design an FSM to count a series of 1's. The FSM should have a single-bit input per clock cycle. The series of 1's must start and end with a 0.
The following metrics were computed from 14 interview experiences for the Nvidia ASIC Design Engineer role in Santa Clara, California.
Nvidia's interview process for their ASIC Design Engineer roles in Santa Clara, California is very selective, failing most engineers who go through it.
Candidates reported having very good feelings for Nvidia's ASIC Design Engineer interview process in Santa Clara, California.