Applied online through the careers page and interviewed in July 2025.
It was a 1-hour technical screening interview. The interviewer tested knowledge on Verilog and C++, asking follow-up questions. There wasn't any time for me to ask questions.
FSM pattern detector
C++ code for Fibonacci sequence
Swap function
Linux-based question: How to replace all instances of a word in a file with another word without opening the file?
Blocking/non-blocking operators in Verilog
The following metrics were computed from 13 interview experiences for the Nvidia ASIC Verification Engineer role in United States.
Nvidia's interview process for their ASIC Verification Engineer roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Nvidia's ASIC Verification Engineer interview process in United States.